A stabilised voltage is applied to a resistance/capacitance circuit. The potential developed across the capacitor is applied to a transistor switching circuit which, in turn, operates an attracted armature relay when the potential reaches the trigger level.
The time delay is varied by altering the resistance value in the resistance/ capacitance circuit by a potentiometer calibrated in seconds. A circuit is incorporated to protect the transistors from damage due to high peak transients in the supply voltage. A diode is also fitted in the circuitry to take care of inadvertent connection of supply with reversed polarity.